1. Field of the Invention
This invention relates generally to digital components, and, more particularly, to controlling timing of the digital components.
2. Description of the Related Art
The demand for quicker and more powerful computers and other such devices has led to many technological advances in the electronic industry, including the development of faster digital components, such as memories, processors, controllers, or the like. While the performance of these digital components has improved markedly in the aggregate, the technological advancements at the individual component level have varied from one digital component to another. That is, it is possible that controllers may not have kept pace with today's faster memories, such as, for example, dynamic random access memories (DRAMs) or static random access memories (SRAMs). Because the technological advancement rate varies for each component, designers are constantly confronted with the challenge of integrating faster components with slower components in a single electrical device, such as a computer.
The integration of faster components with slower ones, however, can result in several problems. For example, a computer having a faster SRAM integrated with slower digital components may have bus contention, as well as other synchronization, problems. A bus contention may occur when the faster SRAM attempts to drive the bus at the same time as one of the slower components. That is, because the SRAM operates at a faster clock speed, it starts driving the bus before the slower component completely stops driving.
One prior art method of integrating faster components with slower ones includes providing an external switch that controls the speed of the faster digital component. This method, however, suffers from at least one shortcoming in that it offers only two speeds, either high or low. Thus, the end user wishing to operate the faster component at a speed somewhere between the high or low speed would not be able to do so using the methods currently known to the art. The prior art method suffers from another shortcoming in that the access time, high-impedance time, low-impedance time, hold time, or output time of the faster component cannot be readily adjusted. Because the aforementioned times are well known to those skilled in the art, they will not be described herein.
The present invention is directed to overcoming, or at least reducing the effects of, one or more of the problems set forth above.